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Silicon Nanowires and Silicon/Molecular Interfaces for Nanoscale Electronics

Citation

Sheriff, Bonnie Ann (2009) Silicon Nanowires and Silicon/Molecular Interfaces for Nanoscale Electronics. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/Q13E-NB40. https://resolver.caltech.edu/CaltechETD:etd-06302008-165534

Abstract

This thesis describes the utilization of silicon nanowires and molecular films towards the realization of nanoscale electronics. The key enabling technology is the method in which the silicon nanowires are produced—the superlattice nanowire pattern transfer (SNAP) method. The SNAP method allows for the simultaneous formation and alignment of metal or semiconducting nanowires using a template-mediated approach.

High-performance n- and p-type silicon nanowire field-effect transistors (FETs) were demonstrated. These FETs exhibited consistent performance and strong performance metrics such as high on/off ratios, high on-currents, high mobilities and low subthreshold swings. Due to the nanowire’s large surface-area-to-volume ratio, surface states were shown to dominate performance, especially for the n-type FETs. Reducing the number of surface states improved performance significantly.

N- and p-type silicon nanowire FETs were integrated into complementary symmetry (CS) logic circuits. This required the development of a pattern doping technique that allowed for spatial control of doped regions. The inverter circuit was fabricated and tested. A gain of ~ 5 was consistently measured from 7 working inverter circuits. This demonstration provided the foundation for the eventual fabrication and characterization of the other Boolean logic functions.

A methodology was developed that optimizes the design of high-performance logic circuits constructed from Si NW p- and n-type FETs. Circuit performance can be predicted from individual fabricated NW FETs before prototype circuits are manufactured, resulting in a faster and more efficient design process. These results suggest design options for fabricating high performance NW circuits, which can then be implemented experimentally. The effectiveness of this methodology is shown by optimizing the gain of Si NW complementary symmetry inverter from an initially measured value of 8 to a gain of 45.

Lastly, methods to covalently attach electronically interesting molecules via microcontact printing onto gold and silicon substrates were developed. In these studies, the Cu(I)-catalyzed azide-alkyne cycloaddition (CuAAC) reaction was used to form the covalent attachment. It was observed that the reaction would proceed readily by replacing the Cu catalyst in the stamp ink by a Cu coating on the stamp directly. This reaction proceeded quickly on both azide-terminated monolayers on Au and Si(111) substrates.

Item Type:Thesis (Dissertation (Ph.D.))
Subject Keywords:circuits; Cu(I)-catalyzed azide-alkyne cycloaddition; field-effect transistors; microcontact printing; nanofabrication; nanowires; silicon; simulations
Degree Grantor:California Institute of Technology
Division:Chemistry and Chemical Engineering
Major Option:Chemistry
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Heath, James R.
Thesis Committee:
  • Collier, C. Patrick (chair)
  • Heath, James R.
  • Okumura, Mitchio
  • Goddard, William A., III
Defense Date:11 June 2008
Record Number:CaltechETD:etd-06302008-165534
Persistent URL:https://resolver.caltech.edu/CaltechETD:etd-06302008-165534
DOI:10.7907/Q13E-NB40
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:2791
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:22 Oct 2008
Last Modified:26 Nov 2019 20:37

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PDF (BAS_complete_thesis.pdf) - Final Version
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PDF (Title_Pages.pdf) - Final Version
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PDF (Chapter_1_Overview.pdf) - Final Version
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PDF (Chapter_2_FETs.pdf) - Final Version
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PDF (Chapter_3_circuits.pdf) - Final Version
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PDF (Chapter_4_In_Silico.pdf) - Final Version
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PDF (Chapter_5_Microcontact.pdf) - Final Version
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