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Production Rule Verification for Quasi-Delay-Insensitive Circuits

Citation

Cook, James N. (1993) Production Rule Verification for Quasi-Delay-Insensitive Circuits. Master's thesis, California Institute of Technology. doi:10.7907/t65k-bq93. https://resolver.caltech.edu/CaltechTHESIS:04022012-152118181

Abstract

No abstract.

Item Type:Thesis (Master's thesis)
Subject Keywords:Computer science
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Computer Science
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Unknown, Unknown
Thesis Committee:
  • Unknown, Unknown
Defense Date:11 June 1993
Record Number:CaltechTHESIS:04022012-152118181
Persistent URL:https://resolver.caltech.edu/CaltechTHESIS:04022012-152118181
DOI:10.7907/t65k-bq93
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:6889
Collection:CaltechTHESIS
Deposited By: Benjamin Perez
Deposited On:02 Apr 2012 22:32
Last Modified:09 Nov 2022 19:20

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