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Distributed Active Transformer for Integrated Power Amplification


Aoki, Ichiro (2002) Distributed Active Transformer for Integrated Power Amplification. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/6XMD-MR86.


A novel on-chip impedance transformation and power-combining technique, the distributed active transformer (DAT) is introduced. It overcomes the fundamental difficulties presented by silicon technology in the design of integrated rf power amplifiers. This technique efficiently combines several low-voltage push-pull amplifiers and simultaneously performs an impedance transformation to produce a larger output power while maintaining a 50Ω match. It also uses virtual ac grounds and magnetic couplings extensively to eliminate the need for any off-chip component, such as tuned bonding wires or external inductors. Furthermore, it desensitizes the operation of the amplifier to the inductance of bonding wires making the design more repeatable.

In this work, the performance of the introduced DAT structure is compared to that of conventional on-chip impedance transformation methods. Their fundamental power-efficiency limitations in the design of high-power fully-integrated amplifiers in standard silicon process technologies are analyzed and the DAT is demonstrated to be more efficient. Furthermore, different classes of power amplification operations and their use in DAT power amplifiers are studied.

To demonstrate the feasibility of this concept several silicon integrated power amplifiers have been fabricated and measured including a 2.4-GHz, 2-W, 2-V truly fully-integrated power amplifier with 50Ω on-chip input and output matching using 0.35µm CMOS transistors. It achieves a power added efficiency (PAE) of 41 % at this power level, demonstrating for the first time a truly fully-integrated watt-level GHz range CMOS power amplifier. It can also produce 450mW using a 1 V supply. A two stage DAT prototype, also at 2.4GHz using the same technology, operates with higher gain and lower supply voltage achieving 1-W output power, 30% PAE, and 14-dB gain with 1.15-V supply.

Item Type:Thesis (Dissertation (Ph.D.))
Subject Keywords:(Electrical Engineering)
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Electrical Engineering
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Janda, Kenneth C.
Thesis Committee:
  • Rutledge, David B. (chair)
  • Hajimiri, Ali
  • Bruck, Jehoshua
  • Weinreb, Sander
  • Tai, Yu-Chong
  • Janda, Kenneth C.
Defense Date:31 October 2001
Record Number:CaltechETD:etd-05272004-094928
Persistent URL:
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:2129
Deposited By: Imported from ETD-db
Deposited On:27 May 2004
Last Modified:15 Jan 2022 00:21

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