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Analog VLSI autonomous systems for learning and optimization

Citation

Cauwenberghs, Gert (1994) Analog VLSI autonomous systems for learning and optimization. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/CW78-8H63. https://resolver.caltech.edu/CaltechETD:etd-10192005-081338

Abstract

The integration of adaptive functions within analog neural hardware, while certainly promising to enhance system performance, has for long been hindered by technological difficulties due to the complexity and sensitivity of standard adaptive algorithms. We present a general framework for self-contained adaptation in analog VLSI supporting a broad class of supervised learning and optimization tasks, which largely alleviates the implementation problems by virtue of a robust system approach exploiting statistics and redundancy in stochastic processes. Specifically, the framework includes: i) a perturbative algorithm based on stochastic approximation to optimize a set of parameters in an arbitrary deterministic system, these parameters being adjusted according to global performance evaluations rather than using explicit knowledge about the internal structure of the system; and ii) a scalable and modular CMOS architecture that implements this algorithm, and that additionally provides for embedded long-term dynamic storage of the volatile analog parameter values, quantized locally and refreshed autonomously on capacitors with direct external access in both digital and analog formats. We analyze the convergence and scaling properties of the stochastic algorithm, present on-line versions of the algorithm for supervised learning in dynamical systems, and provide experimental results demonstrating real-time trajectory learning on an analog CMOS chip containing a network of six fully recurrent dynamical neurons. We also include results demonstrating robust long-term retention of locally stored volatile information in analog VLSI using the autonomous refresh technique.

Item Type:Thesis (Dissertation (Ph.D.))
Subject Keywords:Analog VLSI; learning; memory; optimization; quantization; stochastic approximation
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Electrical Engineering
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Yariv, Amnon
Thesis Committee:
  • Yariv, Amnon (chair)
  • Barr, Alan H.
  • Mead, Carver
  • Psaltis, Demetri
Defense Date:8 December 1993
Non-Caltech Author Email:gert (AT) ucsd.edu
Record Number:CaltechETD:etd-10192005-081338
Persistent URL:https://resolver.caltech.edu/CaltechETD:etd-10192005-081338
DOI:10.7907/CW78-8H63
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:4173
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:19 Oct 2005
Last Modified:20 Dec 2019 19:51

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