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Semantics of VLSI synthesis

Citation

Van der Goot, Marcel Rene (1995) Semantics of VLSI synthesis. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-10162007-093427

Abstract

We develop a new form of formal operational semantics, suitable for concurrent programming languages. The semantics directly supports sequential and parallel composition, rendezvous synchronization, shared variables, and non-determinism. Based on an abstract notion of program execution, a refinement relation is defined. We show how the refinement relation can be used to prove that one program implements another. We use the operational semantics as a semantic framework for a synthesis method for asynchronous VLSI circuits. We define the semantics of the programming notations that are used, and use the refinement relation to prove the correctness of the program transformations that form the basis of the synthesis method. Among other transformations, we proof the correctness of the replacement of atomic synchronization actions by handshake protocols, and the transformation of a sequence of actions into a network of concurrently executing gates.

Item Type:Thesis (Dissertation (Ph.D.))
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Computer Science
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Martin, Alain J.
Thesis Committee:
  • Martin, Alain J. (chair)
  • Sanders, Beverly
  • Hofstee, H. Peter
  • Chandy, K. Mani
  • Abu-Mostafa, Yaser S.
Defense Date:26 May 1995
Author Email:vdgoot (AT) earthlink.net
Record Number:CaltechETD:etd-10162007-093427
Persistent URL:http://resolver.caltech.edu/CaltechETD:etd-10162007-093427
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:4110
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:26 Oct 2007
Last Modified:26 Dec 2012 03:05

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