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Bandgap Engineering Silicon Nanopillars

Citation

Latawiec, Pawel Michal (2013) Bandgap Engineering Silicon Nanopillars. Senior thesis (Major), California Institute of Technology. doi:10.7907/CNP5-BZ88. http://resolver.caltech.edu/CaltechTHESIS:02132018-124953265

Abstract

Vertically oriented , bandgap engineered silicon nanopillars were fabricated and addressed. Devices were fabricated via a three dimensional etching process which created sub-5 nm constrictions in silicon radius upon oxidation. This effect was used to create a Coulomb blockade device. Devices were tested at room and liquid nitrogen temperatures. They showed a clear blockade effect distinctive of an asymmetric double tunnel junction at low temperatures which disappeared when tested at higher temperatures. Different device fabrication parameters were also tested to develop high-current devices, including chip anneal time. Furthermore, both device fabrication steps and current flow were modeled and simulated.

Item Type:Thesis (Senior thesis (Major))
Subject Keywords:Physics
Degree Grantor:California Institute of Technology
Division:Physics, Mathematics and Astronomy
Major Option:Physics
Thesis Availability:Withheld
Research Advisor(s):
  • Scherer, Axel
Group:Kavli Nanoscience Institute
Thesis Committee:
  • None, None
Defense Date:7 May 2013
Record Number:CaltechTHESIS:02132018-124953265
Persistent URL:http://resolver.caltech.edu/CaltechTHESIS:02132018-124953265
DOI:10.7907/CNP5-BZ88
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:10712
Collection:CaltechTHESIS
Deposited By: Joy Painter
Deposited On:14 Feb 2018 00:36
Last Modified:26 Apr 2019 18:01

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