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Number of items: 9.

C

Capponi, Agostino (2006) Estimation problems in sense and respond systems. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05222006-142127

D

deLorimier, Michael (2006) Floating-point sparse matrix-vector multiply for FPGAs. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05132005-144347

K

Kalyanaraman, Shankar (2006) On obtaining pseudorandomness from error-correcting codes. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-06022006-170858

Kapre, Nachiket Ganesh (2006) Packet-switched on-chip FPGA overlay networks. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05312006-164059

Kharevych, Liliya (2006) Implementation of circle pattern parameterization. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05242006-224103

Kharevych, Liliya (2006) Circle Patterns Documentation 1.0 [Supplemental material for Masters thesis: Implementation of circle pattern parameterization (2006)]. UNSPECIFIED. (Unpublished) http://resolver.caltech.edu/CaltechBLOB:etd-05242006-224103.1

Khorlin, Andrey (2006) Scheduling in distributed stream processing systems. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05242006-175006

M

Mehta, Nikil (2006) Time-multiplexed FPGA overlay networks on chip. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05312006-164103

T

Tian, Lu (2006) Resource allocation in streaming environments. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05262006-165801

This list was generated on Sat Oct 25 09:01:11 2014 PDT.