Number of items: 9.
Mehta, Nikil
(2013)
An ultra-low-energy, variation-tolerant FPGA architecture using component-specific mapping.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechTHESIS:10072012-230900231
deLorimier, Michael John
(2013)
GRAph parallel actor language : a programming language for parallel graph algorithms.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechTHESIS:08192012-145253489
Kapre, Nachiket Ganesh
(2010)
SPICE2 -- a spatial parallel architecture for accelerating the spice circuit simulator.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechTHESIS:10262010-082537998
Naeimi, Helia
(2008)
Reliable integration of terascale systems with nanoscale devices.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechETD:etd-01242008-012650
Prakash, Piyush
(2008)
Throughput optimization of quasi delay insensitive circuits via slack matching.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechETD:etd-05262008-234258
Papadantonakis, Karl Spyros
(2006)
Rigorous analog verification of asynchronous circuits.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechETD:etd-01132006-152609
Wong, Catherine Grace
(2004)
High-level synthesis and rapid prototyping of asynchronous VLSI systems.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechTHESIS:11192009-161338958
Fan, Chenggong Charles
(2001)
Fault-tolerant cluster of networking elements.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechETD:etd-08152001-144501
Nyström, Mika
(2001)
Asynchronous pulse logic.
Dissertation (Ph.D.), California Institute of Technology.
http://resolver.caltech.edu/CaltechTHESIS:10152010-145548970
This list was generated on Thu May 23 02:04:41 2013 PDT.
