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Number of items: 18.

B

Burns, Steven Morgan (1991) Performance analysis and optimization of asynchronous circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-07092007-072640

Burch, Jerry R. (1988) A comparison of strict and non-strict semantics for lists. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechTHESIS:03262012-113851465

C

Chang, Xiaofei (2014) Resetting asynchronous QDI systems. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechTHESIS:10042013-160844239

Choo, Young-il (1987) Logic from programming language semantics. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-02282008-111427

H

Hazewindus, Pieter Johannes (1992) Testing delay-insensitive circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-07202007-132706

J

Jang, Wonjin (2008) Soft-error tolerant quasi delay-insensitive circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-11092007-180524

L

Lee, Tak Kwan (1995) A general approach to performance analysis and optimization of asynchronous circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-10172007-090528

Li, Peyyun Peggy (1986) A parallel execution model for logic programming. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-03192008-143903

M

Manohar, Rajit (1999) The impact of asynchrony on computer architecture. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-08112005-114144

N

Nyström, Mika (2001) Asynchronous pulse logic. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechTHESIS:10152010-145548970

P

Prakash, Piyush (2008) Throughput optimization of quasi delay insensitive circuits via slack matching. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05262008-234258

Papadantonakis, Karl Spyros (2006) Rigorous analog verification of asynchronous circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-01132006-152609

Prakash, Piyush (2005) Slack matching. Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-05272005-134017

Papadantonakis, Karl Spyros (2002) What is deterministic CHP, and is slack elasticity that useful? Master's thesis, California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-08222002-122806

Pénzes, Paul Ivan (2002) Energy-delay complexity of asynchronous circuits. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechTHESIS:03022011-131111881

T

Tierno, Jose Andres (1995) An energy-complexity model for VLSI computations. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-10252007-094408

V

Van der Goot, Marcel Rene (1995) Semantics of VLSI synthesis. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-10162007-093427

W

Wong, Catherine Grace (2004) High-level synthesis and rapid prototyping of asynchronous VLSI systems. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechTHESIS:11192009-161338958

This list was generated on Fri Oct 24 02:30:12 2014 PDT.