Grot, Annette C. (1994) Analog GAAS optoelectronic integrated circuits for large scale arrays. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-11302007-082621
This thesis focuses on the design and fabrication of large arrays of analog optoelectronic circuits where transistors and optoelectronic devices such as photodetectors and LEDs are monolithically integrated on a single substrate. This optoelectronic approach allows one to design complex functions with the transistors and use the optoelectronic devices to couple the optical signals in and out of the circuit.
The specific application for the analog optoelectronic circuits is large scale neuron arrays for optical neural networks. A neural network has two main elements: nonlinear elements (neurons) and interconnections (synapses). The neurons perform a nonlinear operation on their incoming signals while the synapses provide the weighted connection between neurons. In an optical neural network, the neurons are arranged as two-dimensional arrays that are optically interconnected using the third dimension.
Two approaches to the design and fabrication of a variety of optoelectronic GaAs neuron circuits will be described. In the first approach, GaAs MESFETs (Metal-Semiconductor-Field-Effect Transistors), double hetero-structure GaAs/A1GaAs LEDs, and photodetectors are fabricated on a GaAs substrate containing epitaxial layers for the different devices. In the other approach, the detector/transistor portion of the circuit is fabricated by Vitesse through MOSIS and the LEDs are integrated afterwards using MBE regrowth. This second approach produces circuits with high uniformity and allows one to fabricate more complex optoelectronic circuits at a reasonable cost and turn-around-time. Most of the circuits are based on high responsivity optical FET detectors, which make it possible to build high optical gain circuit with little electrical power dissipation and small surface area.
|Item Type:||Thesis (Dissertation (Ph.D.))|
|Degree Grantor:||California Institute of Technology|
|Major Option:||Electrical Engineering|
|Thesis Availability:||Restricted to Caltech community only|
|Defense Date:||19 May 1994|
|Default Usage Policy:||No commercial reproduction, distribution, display or performance rights in this work are provided.|
|Deposited By:||Imported from ETD-db|
|Deposited On:||06 Dec 2007|
|Last Modified:||26 Dec 2012 03:11|
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