Citation
Reardon, Bernard Charles (1964) Deposited Loops Coupling Magnetic Films as Fast Computer Elements. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/1FZC-JY74. https://resolver.caltech.edu/CaltechETD:etd-10302002-083025
Abstract
NOTE: Text or symbols not renderable in plain ASCII are indicated by [...]. Abstract is included in .pdf document. An experimental study of the fast switching properties of the film-loop assemblies indicated that a line charge model for a rectangular magnetic film represents the external flux distribution of the film with good ([...]10%) accuracy. The flux linkage of a deposited loop equals 100% of the film flux. A 20% decrease in film flux was measured at both ends of the film easy axis and a quadratic flux distribution is consistent with the experimental results. Eddy current and circulating loop current fields affect the nanosecond range switching of magnetic films. Eddy current fields increase rapidly with the fraction of magnetic film perimeter covered by the loop conductors. Capacitive loop current fields cause a small increase in film switching time. Resistive loop loading can slow film switching significantly. The bias and drive field properties of deposited loops can be predicted from the loop dimensions. The deposition of complete film assemblies was effected without opening the vacuum of the system. The film switching test equipment incorporated a new method for the integration of fast switching signals and had a response time of 0.8 nsec. A theoretical study of the coupling loop circuitry indicated that the loop attenuation and the spatial distribution of loop induced voltage distort the film output signal. These effects are small, but not negligible, for a loop with conductor separation of 50,000 A and conductor thicknesses of 4000 A, enclosing a 1 cm[superscript 2] film switching in 1 nsec. The use of integrated deposited circuitry containing magnetic films is feasible for fast computers. A set of logic elements suitable for a deposited configuration has reasonable fan-in and fan-out potentialities. Theoretical miniaturization limits for deposited film logic circuitry depend chiefly on the resistivity of the coupling loops. Operation of such circuitry at low temperature reduces the limit of film size to about 14 microns. Miniaturization alleviates the effect of loop currents and attenuation on film switching signals, leading to low power, short switching time circuitry.
Item Type: | Thesis (Dissertation (Ph.D.)) |
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Subject Keywords: | (Electrical Engineering and Mathematics) |
Degree Grantor: | California Institute of Technology |
Division: | Engineering and Applied Science |
Major Option: | Electrical Engineering |
Minor Option: | Mathematics |
Thesis Availability: | Public (worldwide access) |
Research Advisor(s): |
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Thesis Committee: |
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Defense Date: | 2 April 1964 |
Record Number: | CaltechETD:etd-10302002-083025 |
Persistent URL: | https://resolver.caltech.edu/CaltechETD:etd-10302002-083025 |
DOI: | 10.7907/1FZC-JY74 |
Default Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. |
ID Code: | 4311 |
Collection: | CaltechTHESIS |
Deposited By: | Imported from ETD-db |
Deposited On: | 30 Oct 2002 |
Last Modified: | 25 Jan 2024 00:35 |
Thesis Files
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PDF (Reardon_b_1964.pdf)
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