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Microwave integrated phased array receivers in silicon

Citation

Guan, Xiang (2006) Microwave integrated phased array receivers in silicon. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-09302005-024349

Abstract

Microwave integrated systems in silicon provide a low cost, low power and high yield solution for wideband data communication, radar, and many other applications. Phased-array systems are capable of steering the radiation beam by electronic means, emulating the behavior of a directional antenna. This dissertation is dedicated to presenting various techniques to implement microwave integrated phased-array receivers in silicon-based technologies in the context of three design examples. A 24-GHz 0.18-µm complementary metal oxide semiconductor (CMOS) front-end was demonstrated. The front-end consists of a low noise amplifier (LNA) and a mixer. The LNA utilizes a novel topology common-gate with resistive feedthrough to obtain low-noise performance. The entire front-end achieves a 7.7dB noise figure and a 27.5dB power gain. A fully integrated 8-element 24-GHz silicon germanium (SiGe) phased array receiver was implemented. The receiver uses two-step downconversion and local oscillator (LO) phase shifting with 4-bit resolution. The signal is combined at the 4.8-GHz intermediate frequency. The 16 phases of 19.2-GHz LO signal are generated with a voltage controlled oscillator (VCO) and symmetrically distributed to the phase selectors at all path. Appropriate phase sequence is applied to the phase distribution transmission lines to minimize mismatch. An integrated frequency synthesizer locks the 19.2-GHz VCO output to a 75-MHz external reference. Measured array patterns show a peak-to-null ratio of more than 20dB and a beam steering range covering all signal incident angles. An integrated 4-element 77-GHz SiGe wideband phased-array transceiver was implemented. Two-step conversion is used at both the receiver and the transmitter. A differential phase of 52 GHz is generated by the VCO and distributed to all RF paths at the transmitter and receiver. The phase shifting is performed at the LO ports of the RF mixers using continuous analog phase shifters. The quadrature signal of the second LO frequency is generated by dividing the VCO frequency by a factor of 2 using a cross-coupled injection-locked frequency divider. The signal combining is performed at IF with an active combining amplifier. The receiver achieves a 41dB gain at 80 GHz with 3 GHz of bandwidth. The 52-GHz-to-50MHz frequency divider chain obtains 7% locking range.

Item Type:Thesis (Dissertation (Ph.D.))
Subject Keywords:integrated circuits; low noise amplifier; microwave; phased array; radar; wireless communications
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Electrical Engineering
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Hajimiri, Ali
Thesis Committee:
  • Hajimiri, Ali (chair)
  • Yang, Changhuei
  • Rutledge, David B.
  • D'Addario, Larry R.
  • Weinreb, Sander
Defense Date:22 September 2005
Author Email:seanguan (AT) gmail.com
Record Number:CaltechETD:etd-09302005-024349
Persistent URL:http://resolver.caltech.edu/CaltechETD:etd-09302005-024349
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:3834
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:03 Oct 2005
Last Modified:10 Dec 2014 20:14

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