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Foundations of learning in analog VLSI

Citation

Hasler, Paul Edward (1997) Foundations of learning in analog VLSI. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-06062005-155140

Abstract

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Floating-gate technology can be used to build silicon systems that adapt and learn. This technology is well suited to implement adaptation and learning because we are not building analog EEPROMS, but rather circuit elements with important time domain dynamics. These floating-gate circuits use the hot-electron-injection, electron-tunneling, and drain-induced-barrier-lowering phenomena in a standard submicron CMOS process. This technology works with the constraints of the silicon medium, and is similar to biological systems that turned potential liabilities into features.

I develop the first analytical model of the impact-ionization and hot-electron processes in MOS devices by solving for a self-consistent distribution function from the spatially varying Boltzmann transport equation. From this electron distribution function, the probabilities of impact ionization and hot-electron injection are calculated as functions of channel current, drain voltage, and floating-gate voltage. The analytical model simultaneously fits both the hot-electron-injection and impact-ionization data. These analytical results yield measurements of the energy-dependent impactionization collision rate that is consistent with numerically calculated collision rates reported in the literature.

I describe the design, fabrication, characterization, and modeling of an array of single-transistor synapses that simultaneously store the weight value, compute the product of the input and floating gate value, and update the weight value according to a hebbian or backpropagation learning rule. Circuits with one floating-gate synapse exhibit a range of possible stabilizing and destabilizing behaviors, and circuits with multiple-synapses show examples of competitive and cooperative behavior. By providing feedback to the source, we get a [...]FET synapse where voltage changes in both the floating gate and drain stabilize the floating gate.

I present a bandpass floating gate amplifier that uses tunneling and [...]FET hot-electron injection to adaptively set its DC operating point. Because the gate currents are small, the circuit exhibits a high-pass characteristic with a cutoff frequency less than 1 Hz. The high frequency cutoff is controlled electronically, as is done in continuous-time filters. I have derived analytical models that completely characterize the amplifier and that are in good agreement with experimental data for a wide range of operating conditions and input waveforms. This autozeroing floating-gate amplifier demonstrates how to use continuous-time, floating-gate adaptation.

Item Type:Thesis (Dissertation (Ph.D.))
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Computation and Neural Systems
Thesis Availability:Public (worldwide access)
Research Advisor(s):
  • Mead, Carver
Thesis Committee:
  • Mead, Carver (chair)
  • Koch, Christof
  • Psaltis, Demetri
  • Goodman, Rodney M.
Defense Date:3 February 1997
Record Number:CaltechETD:etd-06062005-155140
Persistent URL:http://resolver.caltech.edu/CaltechETD:etd-06062005-155140
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:2477
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:06 Jun 2005
Last Modified:26 Dec 2012 02:51

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