CaltechTHESIS
  A Caltech Library Service

Analysis, synthesis, and implementation of networks of multiple-input translinear elements

Citation

Minch, Bradley Arthur (1997) Analysis, synthesis, and implementation of networks of multiple-input translinear elements. Dissertation (Ph.D.), California Institute of Technology. http://resolver.caltech.edu/CaltechETD:etd-01162008-075623

Abstract

At the time of its invention in the seventeenth century, the logarithmic slide rule literally revolutionized the way calculation was done. From then until the advent of the pocket calculator, this analog computational device was widely used to perform multiplications and divisions, to raise numbers to fixed powers and extract fixed roots of numbers. Today, the slide rule may be gone, but it is not forgotten. In this thesis, I present a class of simple translinear network circuits which essentially function as electronic slide rules, accurately computing products, quotients, powers, and roots. I describe two different analysis procedures that allow us to determine the steady-state relationship between input and output currents. I also describe systematic techniques for synthesizing such circuits whereby we can produce a circuit whose steady-state transfer characteristics embody some desired product-of-power-law relationship between input and output currents. These circuits are made from multiple-input translinear elements; such elements produce output currents that are proportional to the exponential of a weighted sum of their input voltages. We can implement the weighted voltage summations with either resistive or capacitive voltage dividers. We can obtain the required exponential voltage-to-current transformations from either bipolar transistors or subthreshold MOS transistors. The subthreshold floating-gate MOS transistor naturally implements the exponential-of-a-weighted-sum operation in a single device. I will present experimental results from several of these translinear network circuits breadboarded from subthreshold floating-gate MOS transistors. I will also describe and present experimental data from a variety of other implementations of the multiple-input translinear element.

Item Type:Thesis (Dissertation (Ph.D.))
Degree Grantor:California Institute of Technology
Division:Engineering and Applied Science
Major Option:Computation and Neural Systems
Thesis Availability:Restricted to Caltech community only
Research Advisor(s):
  • Mead, Carver
Thesis Committee:
  • Mead, Carver (chair)
  • Barr, Alan H.
  • Bruck, Jehoshua
  • Middlebrook, Robert David
  • Abu-Mostafa, Yaser S.
Defense Date:20 May 1997
Record Number:CaltechETD:etd-01162008-075623
Persistent URL:http://resolver.caltech.edu/CaltechETD:etd-01162008-075623
Default Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:199
Collection:CaltechTHESIS
Deposited By: Imported from ETD-db
Deposited On:13 Feb 2008
Last Modified:26 Dec 2012 02:28

Thesis Files

[img] PDF (Minch_ba_1997.pdf) - Final Version
Restricted to Caltech community only
See Usage Policy.

7Mb

Repository Staff Only: item control page